Process for bonding a shell to a substrate for packaging a semiconductor
Patent # U.S. 5,837,562; Date Issued: November 17, 1998

A process for manufacturing a vacuum enclosure for a semiconductor device formed on a substrate with leads extending peripherally. Assembly of the enclosure is compatible with known batch fabrication techniques and is carried out at pressures required for optimal device operation. In a first embodiment, an intrinsic silicon shell is sealed to the substrate via electrostatic or anodic bonding with the leads diffusing into the shell. In a second embodiment, a thin interface layer of silicon or polysilicon is deposited on the substrate prior to electrostatic bonding a glass shell thereon. In a third embodiment, tunnels are formed between a lower peripheral edge of the shell and the substrate, allowing leads to pass thereunder. The tunnels are sealed by a dielectric material applied over the enclosure.

Co-applicant: Massachusetts Institute of Technology, Cambridge, MA
Net-shape ceramic processing for electronic devices and packages
Patent # U.S. 5,834,840; Date Issued: November 10, 1998

An electronic device package is provided, consisting of reaction bonded silicon nitride structural and dielectric components and conductor, resistor, and capacitor elements positioned with the package structural components. The package consists of a ceramic package base characterized by a dielectric constant less than 6, of reaction bonded silicon nitride, or a heat spreader material. An electrical conductor is positioned on, embedded in, or attached to the package base for making electrical contact to an electronic device supported on the base and in preferred embodiments, a resistor is attached to the package base. The invention also provides package sidewalls connected to the package base, preferably of reaction bonded silicon nitride, and at least one electrical conductor extending to an outside surface of the package sidewalls for making electrical contact to an electronic device supported by the package base. The reaction formed electronic device packages of the invention provide the ability to support high device signal frequencies, high device operational temperatures, and high environmental temperatures, due to the characteristics of the package materials. The reaction formed electronic device packages of the invention may be produced with a nitriding process during which the overall package structure exhibits minimal shrinkage. As a result, the reaction formed electronic device packages of the invention may be shaped to finished dimensions before the nitriding process with complicated and tight-tolerance geometries of package structural, conducting, resistive, and capacitive components.

Capacitive in-plane accelerometer
Patent # U.S. 5,817,942; Date Issued: October 6, 1998

An accelerometer having one or more flexure stops for increasing the stiffness of the flexures when the accelerometer is subjected to relatively high acceleration. A wrap-around proof mass is suspended over a substrate by anchor posts and a plurality of flexures. In one embodiment, the proof mass has a rectangular frame including top and bottom beams extending between left and right beams and a central crossbeam extending between the left and right beams. Proof mass sense electrodes are cantilevered from the top, bottom and central beams and are interleaved with excitation electrodes extending from adjacent excitation electrode supports. Each of the flexure stops includes a pair of members extending along a portion of a respective flexure. Also described is a three axis accelerometer triad device and a dissolved wafer process for fabricating the devices described herein.

RF balanced capacitive vibration sensor system
Patent # U.S. 5,808,198; Date Issued: September 15, 1998

An RF balanced capacitive vibration sensor system includes a carrier generator for generating an r.f. carrier and an inverted r.f. carrier; a voltage tunable capacitive vibration sensor responsive to one of the carriers; a reference capacitor responsive to the other of the carriers; a summing device for combining the outputs from the sensor and reference capacitors; a controller device for adjusting the amplitude of the carriers to tune the capacitance of the sensor to that of the reference capacitor; the sensor modulating one of the carriers with a vibration modulation signal representative of a sensed vibration; an r.f. amplifier device responsive to the summing device for amplifying the modulated carrier from the sensor; and a detector device, responsive to the modulated carrier from the r.f. amplifier, for detecting the modulation signal representative of the sensed vibration.

Net-shape ceramic processing for electronic devices and packages
Patent # U.S. 5,801,073; Date Issued: September 1, 1998

A method of producing electronic device packages is provided, consisting of the steps of shaping a package preform and heating the package preform in a nitrogen-containing atmoshpere to nitride the package preform. The shaped package preform may consist of package base, sidewall, conductor, resistor, or capacitor components. The package base and sidewall components may be formed of silicon powder. The method also accommodates the step of inserting a semiconducting material into the package preform and heating the semiconducting material component along with the package preform. The inserted semiconducting material component may be processed to define active electronic device areas on the component either before or after the step of heating the shaped package preform and inserted semiconducting material component. The package production methods of the invention provide the ability to produce reaction bonded structural and dielectric package components by way of a nitriding process that causes minimal overall shrinkage of the package. As a result, reaction formed electronic device packages of the invention may be shaped to finished dimensions before the nitriding process with complicated and tight-tolerance geometries of package structural, conducting, resistive, and capacitive components. The package production methods of the invention also provide the ability to interleave electronic device and packaging manufacturing sequence steps, resulting in increased manufacturing efficiency, as well as improved performance in the devices and packages produced. Device substrates or partially fabricated devices may be embedded into semi-finished packages, whereby completion of device fabrication coincides with completion of package fabrication. This makes possible the fabrication of active devices and circuits in a fully packaged environment.

Monolithic micromechanical tuning fork angular rate sensor
Patent # U.S. 5,796,001; Date Issued: August 18, 1998

A monolithic, micromechanical tuning fork gyroscope is fabricated from a unitary silicon substrate utilizing etch stop diffusions and selective anisotropic etching. A non-etched silicon structure is suspended over the selectively etched pit. The non-etched silicon structure includes at least first and second vibratable structures. Each vibratable structure is energizable to vibrate laterally along an axis normal to the rotation sensitive axis. The lateral vibration of the first and second vibratable structures effects simultaneous vertical movement of at least a portion of the non-etched silicon structure upon the occurrence of angular rotation of the gyroscope about the rotation sensitive axis. The vertical movement of the non-etched silicon structure is sensed, and a voltage proportional to the movement is generated, for providing an indication of angular rate of rotation detected by the gyroscope.

Temperature insensitive silicon oscillator and precision voltage reference formed therefrom
Patent # U.S. 5,783,973;  Date Issued: July 21, 1998

Micromachined, thermally insensitive silicon resonators are provided having accuracy equivalent or superior to that of quartz resonators, and are fabricated from a micromechanical, silicon on-glass process. In one embodiment, such a resonator is realized using a tuning fork gyroscope. Radiation-hard precision voltage references (PVRs) are enabled using the silicon resonators. Thermal sensitivity is reduced relative to that of a silicon-onsilicon process oscillator, providing a thermal sensitivity comparable to that of a quartz oscillator. By employing a micromechanical device based upon a tuning fork gyroscope, resonators are made from either or both of the gyro drive and sense axes. A resonator constructed as an oscillator loop whose resonant frequency is compared to a frequency standard provides a bias voltage as a reference voltage.

Comb-drive micromechanical tuning fork gyroscope with piezoelectric readout
Patent # U.S. 5,767,405;  Date Issued: June 16, 1998

A microfabricated, tuning fork rate sensitive structure and drive electronics in which vibrational forces are communicated through a set of meshing drive and driven finger electrodes associated with each of two vibrating elements. The vibrating elements are supported in a rotatable assembly between first and second support electrodes which are in turn suspended by flexures for rotation about an axis passing through the flexures and through a point midway between the vibrating elements. Additional masses are formed onto the vibrating elements to improve overall sensor sensitivity. Sense electrodes for detecting capacitive changes between the support beams and the substrate are positioned on the substrate beneath each end of the support beams. In an alternative embodiment, piezoelectric sense capacitors are disposed on the flexures for detecting rotation of the support electrodes. Drive electronics are connected between the driven fingers of the vibrating elements and the drive electrode fingers which mesh with them to cause vibration. Excitation is provided between the support electrodes and the sense electrodes. Any change in signal resulting from rotation of the assembly and the resulting variation in capacitance between the support electrodes and the sense electrodes or within the piezoelectric capacitors is sensed as a measure of inertial rate. A torque loop may be additionally formed using the sense electrodes in order to re-torque the assembly to a neutral position in a torque-to-balance loop.

Monolithic micromechanical vibrating beam accelerometer with trimmable resonant frequency
Patent # U.S. 5,760,305;  Date Issued: June 2, 1998

A monolithic, micromechanical vibrating beam accelerometer with a trimmable resonant frequency is fabricated from a silicon substrate which has been selectively etched to provide a resonant structure suspended over an etched pit. The resonant structure comprises an acceleration sensitive mass and at least two flexible elements having resonant frequencies. Each of the flexible elements is disposed generally collinear with at least one acceleration sensitive axis of the accelerometer. One end of at least one of the flexible elements is attached to a tension relief beam for providing stress relief of tensile forces created during the fabrication process. Mass support beams having a high aspect ratio support the mass over the etched pit while allowing the mass to move freely in the direction collinear with the flexible elements. Also disclosed is a method for fabricating such an accelerometer. Further disclosed is an alternative embodiment of the aforementioned accelerometer characterized by a low profile, and alternative planar processing methods for fabrication of these and other embodiments.

Tunneling sensor with linear force rebalance and method for fabricating the same
Patent # U.S. 5,752,410;  Date Issued: May 19, 1998

A tunneling sensor is disclosed having a pair of force rebalance capacitors that are used in a push-pull relationship so as to provide a rebalance force that is a linear function of applied rebalance voltages, which leads to an output voltage that is linearly related to input acceleration. The tunneling sensor comprises a plate electrode that is formed from and attached to a silicon substrate by a pair of torsional flexures, which provide an axis of rotation for the plate electrode. A pendulous mass is formed on a first end of the plate electrode, and a tunnel-effect contact is formed on a second end of the plate electrode. A pair of torque rebalance bridge electrodes are formed on the substrate so as to span the plate electrode. A tunnel-effect tip is formed on the substrate so as to be proximate the tunnel-effect contact and in line with the rotational path that the tunnel-effect contact takes when the plate electrode is rotated.

Beat frequency motor position detection scheme for tuning fork gyroscope and other sensors
Patent # U.S. 5,747,961; Date Issued: May 5, 1998

A tuning fork gyroscope has an in-plane position sensitive pickoff to which an AC or AC+DC bias is applied. Intermodulation is exploited to produce beat-notes between the applied frequency and the motor frequency at amplitudes proportional to motor amplitude, but unaffected by error sources such as spurious substrate charge accumulation. The beat-notes are used to control motor amplitude without the effects of charge accumulation.

GPS transfer initialization system
Patent # U.S. 5,739,786; Date Issued: April 14, 1998

A GPS transfer initialization system for initializing a mobile unit from a base unit, includes a GPS receiver in the mobile unit for receiving a GPS signal including a time register, a frequency register, and a GPS reference oscillator for generating a GPS carrier signal of a first frequency; a mobile transmitter/receiver circuit on the mobile unit responsive to the GPS carrier signal, for generating and transmitting a transfer carrier signal of a second frequency that is a multiple of the first frequency; a base transmitter/receiver circuit on the base unit including a GPS calibrated frequency and time reference for providing a GPS calibrated signal of a third frequency; an error detection circuit for comparing the GPS calibrated signal and the transfer carder signal to generate a frequency error signal determined from the difference between them and representative of the error in the frequency of the GPS reference oscillator; and an error correction circuit responsive to the GPS calibrated frequency and time reference and to the error detection circuit for generating and transmitting the GPS time and error signal; the mobile transmitter/receiver circuit including an initializing circuit responsive to the GPS time and the error signal for adjusting the time register and frequency register to the correct GPS time and frequency.

Micromechanical d'arsonval magnetometer
Patent # U.S. 5,731,703; Date Issued: March 24, 1998

A micromechanical D'Arsonval magnetometer for sensing magnetic fields at low frequency with high sensitivity for operation near the resonant frequency of a micromechanical structure comprising a movable proof mass supported by torsion flexures, a conductive winding formed on the movable proof mass, at least one bridge electrode spanning the movable proof mass, a source for electrically biasing the movable proof mass relative to the bridge electrode(s), and a drive for electrically driving the conductive winding. Magnetic fields in the plane of the proof mass perpendicular to an axis of rotation formed by the torsion flexures interact with current passing through the conductive winding so as to torque the proof mass about the axis of rotation, whereby the resulting rotation is sensed through capacitors formed between the proof mass and the bridge electrode(s). The present invention micromechanical D'Arsonval magnetometer can be operated either open or closed loop. An open loop embodiment allows the proof mass to twist solely under the influence of the magnetic fields, while a closed loop embodiment restrains the proof mass motion. The loop can be closed by constructing additional electrodes or by using the existing bridge electrode(s) for both sensing and rebalancing.

Process for micromechanical fabrication; semiconductors
Patent # U.S. 5,725,729;   Date Issued: March 10, 1998

An improved process for fabricating micromechanical devices having movable members, such as gyros and accelerometers. A starting wafer includes an oxidized silicon wafer which has been wafer bonded to a second silicon wafer which has a thin N layer on a P substrate. The wafer is patterned, doped and etched in a series of process steps which include the deposition of epitaxial layers to configure critical device dimensions and geometry. Metallizations are deposited for electrical/electronic interconnections. The process includes an ability to integrate on-chip electronics on the silicon substrate. Alignment difficulties and thermal mismatch associated with prior art processes are minimized.